1. Field of the Disclosure
The present disclosure generally relates to data processing devices, and more particularly to thread management for data processing devices.
2. Description of the Related Art
To improve the efficiency of execution for a multi-threaded application, a data processing device can employ thread-level parallelism, whereby different processor cores of the data processing device concurrently execute different threads of the multi-threaded application. During execution, load imbalances, such as a disparity between the number of cache accesses associated with each concurrently executing thread, can cause the concurrently executing threads to complete operations at disparate rates. Because of interaction between threads, the disparity can cause faster-operating threads to become idle as they await the completion of operations by slower-operating threads. In addition, the disparity between the rates of thread operation can vary over time for a multi-threaded application and can also vary based on the architecture of the data processing device.
The use of the same reference symbols in different drawings indicates similar or identical items.